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TMS320C5515
SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
www.ti.com
5.12 Inter-Integrated Circuit (I2C)
The inter-integrated circuit (I2C) module provides an interface between the device and other devices
compliant with Philips Semiconductors Inter-IC bus (I 2 C-bus?) specification version 2.1. External
components attached to this 2-wire serial bus can transmit/receive 2 to 8-bit data to/from the DSP through
the I2C module. The I2C port does not support CBUS compatible devices.
The I2C port supports the following features:
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Compatible with Philips I2C Specification Revision 2.1 (January 2000)
Data Transfer Rate from 10 kbps to 400 kbps (Philips Fast-Mode Rate)
Noise Filter to Remove Noise 50 ns or Less
Seven- and Ten-Bit Device Addressing Modes
Master (Transmit/Receive) and Slave (Transmit/Receive) Functionality
One Read DMA Event and One Write DMA Event, which can be used by the DMA Controller
One Interrupt that can be used by the CPU
Slew-Rate Limited Open-Drain Output Buffers
The I2C module clock must be in the range from 6.7 MHz to 13.3 MHz. This is necessary for proper
operation of the I2C module. With the I2C module clock in this range, the noise filters on the SDA and
SCL pins suppress noise that has a duration of 50 ns or shorter. The I2C module clock is derived from the
DSP clock divided by a programmable prescaler.
112
Peripheral Information and Electrical Specifications
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